The 68th JSAP Spring Meeting 2021

Presentation information

Oral presentation

15 Crystal Engineering » 15.6 Group IV Compound Semiconductors (SiC)

[18p-Z05-1~16] 15.6 Group IV Compound Semiconductors (SiC)

Thu. Mar 18, 2021 1:30 PM - 6:00 PM Z05 (Z05)

Takuji Hosoi(Osaka Univ.), Wakana Takeuchi(Aichi Inst. of Tech.), Hirohisa Hirai(AIST)

3:45 PM - 4:00 PM

[18p-Z05-9] Positive VFB shift of 4H-SiC MOS capacitors induced by Al2O3/SiO2 interface dipole layer formation

〇(D)Taehyeon Kil1, Munetaka Noguchi2, Hiroshi Watanabe2, Koji Kita1 (1.Dept. of Materials Engineering, The Univ. of Tokyo, 2.Advanced Technology R&D Center, Mitsubishi Electric Corporation)

Keywords:4H-SiC, Flat-band voltage, Dipole layer

Generally, threshold voltage (Vth) of SiC-MOSFET is tuned by the channel doping concentration, however, an intentional increase in the doping concentration to achieve a sufficiently large Vth can cause a significant deterioration of channel conductance. Introduction of negative fixed charges at SiO2/4H–SiC interface may also contribute to the positive shift of Vth, but this might have some influence on its reliability. Therefore, additional novel processes are demanded for the increase of Vth while maintaining the oxide-semiconductor interface quality or channel mobility of MOSFETs. In this work, we demonstrated the formation of an additional dipole layer on top of SiO2 for the control of flat-band voltage of SiO2/4H-SiC MOS capacitors. We have already clarified the dipole layer formation at SiO2/SiC interface by interface nitridation, but in this work we are going to manipulate the dipoles formed in the gate dielectric layer by using Al2O3/SiO2 interface.