[AMD4] Emerging TFTs

[AMD4-4L] Integrated Polycrystalline Silicon Photomask Technology for Low-Temperature Polycrystalline Silicon (LTPS) TFTs

*Jia-Hong Ye¹, Ching-Liang Huang¹, Kuo-Yu Huang¹, Maw-Song Chen¹, Wen-Ching Tsai¹, Wei-Ming Huang¹, Yang-An Wu¹ (1. AUO (Taiwan))

Keywords:LTPS TFTs, Hybrid Backplane, LTPO

A novel Four-Photomask complementary metal oxide semiconductor (CMOS) technology for low temperature polycrystalline silicon (poly-Si) thin film transistors (LTPS TFTs) was proposed in the first time. The combination of poly-Si layer and P plus (P+) region definitions within one lithography process was realized by a half-tone photomask. In this paper, the characteristics of TFTs within a half-tone Poly-Si Photomask of lithography processes were reported and compared with electrical characteristics of typical Six-Photomask lithography processes. The Integrated Poly-Si Photomask Technology can be applied to reduce the numbers of photomask of making an IGZO and LTPS Hybrid TFTs Array.