The 76th JSAP Autumn Meeting, 2015

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

[15p-1C-1~18] 13.5 Semiconductor devices and related technologies

Tue. Sep 15, 2015 1:15 PM - 6:00 PM 1C (135)

座長:齋藤 真澄(東芝),入沢 寿史(産総研)

1:30 PM - 1:45 PM

[15p-1C-2] Impact of Random Telegraph Noise (RTN) on Write Stability in Silicon-on-thin-BOX (SOTB) SRAM Cells in Sub-0.4V Regime

〇(D)Hao Qiu1, Tomoko Mizutani1, Yoshiki Yamamoto2, Hideki Makiyama2, Tomohiro Yamashita2, Hidekazu Oda2, Shiro Kamohara2, Nobuyuki Sugii2, Takuya Saraya1, Masaharu Kobayashi1, Toshiro Hiramoto1 (1.Institute of Industrial Science, The University of Tokyo, 2.LEAP)

Keywords:random telegraph noise,SRAM,low supply voltage

Impact of random telegraph noise (RTN) on write stability of silicon-on-thin-BOX (SOTB) SRAM cells is investigated in sub-0.4V regime. Write N-curve is selected as the metric characterizing SRAM cells' write stability. A statistical model is proposed to calculate impact of RTN on fail bit rate (FBR). It is found that, different from at high VDD, FBR is largely degraded by RTN in sub-0.4V regime and special care is suggested to be taken for RTN in SRAM design.