The 79th JSAP Autumn Meeting, 2018

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13 Semiconductors » 13.5 Semiconductor devices and related technologies

[20a-CE-1~12] 13.5 Semiconductor devices and related technologies

Thu. Sep 20, 2018 9:00 AM - 12:15 PM CE (Century Hall)

Takahiro Mori(AIST)

10:15 AM - 10:30 AM

[20a-CE-6] Design and analysis of virtually nonvolatile retention SRAM using dual-mode inverters

〇Hayato Yoshida1, Daiki Kitagata1, Shuu'ichiro Yamamoto1, Satoshi Sugahara1 (1.FIRST,Tokyo inst. of Tech.)

Keywords:Power gating, SRAM