2019年第66回応用物理学会春季学術講演会

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13 半導体 » 13.5 デバイス/配線/集積化技術

[11a-PB3-1~11] 13.5 デバイス/配線/集積化技術

2019年3月11日(月) 09:30 〜 11:30 PB3 (武道場)

09:30 〜 11:30

[11a-PB3-8] A Graphene Hall Element and CMOS monolithic Integrated Circuit

Chengying Chen1、Yijun Cai1、〇YI CHEN1 (1.Xiamen Univ of technology)

キーワード:graphene, CMOS, Integration

It is well known that graphene, as a zero bandgap material, has low switching ratio and poor saturation output characteristics, which is difficult to replace the mainstream CMOS process in digital and analog integrated circuits. But as a sensor material, graphene has the characteristics of high sensitivity and high stability. The combination of graphene sensor and silicon-based CMOS circuit can give full play to their respective advantages. In previous work, graphene is mainly used as interconnect material to integrate with CMOS circuits. In this paper, a low temperature preparation method of graphene (< 110oC) is explored, and a CMOS readout circuit including a programmable gain amplifier(PGA) and an Sigma-Delta analog-to-digital converter is designed, which greatly improves the performance of graphene hall element(GHE) IC chip. The Graphene Hall Element and CMOS (GHEC) IC chip is fabricated with 0.18μm CMOS technology. The test results show that the low-frequency noise of the chip is well suppressed at 3.3V supply voltage. Its relative sensitivity of current and voltage mode is 134000 V/AT and 10 V/VT respectively, which can be applied in the field of speed measurement and alternating current detection.