2022 International Conference on Solid State Devices and Materials

講演情報

Oral Presentation

02: Advanced and Emerging Memories / New Applications

[F-2] PCM, MRAM, and RRAM

2022年9月27日(火) 14:00 〜 15:30 201 (2F)

Session Chair: Atsushi Himeno (Panasonic Corporation), Laurent Grenouillet (CEA-Leti)

14:00 〜 14:15

[F-2-01] Study of Write Error Rate in MRAM with Fixed Voltage Input

〇Lihua An1, Yue Xin1, Zhengping Yuan1, Yumeng Yang1, Zhifeng Zhu1 (1. ShanghaiTech Univ. (China))

Presentation style: Online

https://doi.org/10.7567/SSDM.2022.F-2-01

The write error rate (WER) is studied in the bit cell driven by a fixed voltage. A new simulation framework is developed to enable the co-simulation of magnetic tunnel junction (MTJ) and transistor. In contrast to the commonly known result, the WER has a significant dependence on the device properties such as the resistance and the area of MTJ. For the devices studied here, the WER decreases from 31% to 3% as the resistance is increased from 1kΩ to 6kΩ, and the WER increases from 31% to 67% when the area is increased from 50nm×50nm to 100nm×100nm. In addition, our results show that the device with a higher resistance-area product can be more attractive when one has a strict requirement on the WER.

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