10:15 〜 10:30

[B-7-05] Vertical Double-Gate 1T DRAM with an Asymmetric Oxide Barrier for Significant Enhancement of Data Retention

^○J.Y. Lee¹, J. Ha², I.H. Cho², S. Cho¹ (1.Gachon University (Korea), 2.Myongji University (Korea))

https://doi.org/10.7567/SSDM.2018.B-7-05