The Japan Society of Applied Physics

[E-4-2] An Ultra-Low Power Expandable 4-bit Adder/Subtracter IC Using Adiabatic Dynamic CMOS Logic Circuit Technology

Kazukiyo Takahashi、Koichi Ikeda、Mitsuru Mizunuma (1.Yamagata University, Faculty of Engineering, Department of Electrical and Information Engineering)

https://doi.org/10.7567/SSDM.1999.E-4-2