Low-Power Data-Preserving Complementary Pass-Transistor-Based Circuit for Power-Down Circuit Scheme

Ki-Tae Park; Tomokatsu Mizukusa; Hyo-Sig Won; Kyu-Myung Choi; Jeong-Taek Kong; Hiroyuki Kurino; Mitsumasa Koyanagi

doi:https://doi.org/10.7567/SSDM.2001.D-2-2

[D-2-2] Low-Power Data-Preserving Complementary Pass-Transistor-Based Circuit for Power-Down Circuit Scheme

Ki-Tae Park、Tomokatsu Mizukusa、Hyo-Sig Won、Kyu-Myung Choi、Jeong-Taek Kong、Hiroyuki Kurino、Mitsumasa Koyanagi (1.Dept. of Machine Intelligence and Systems Engineering, Tohoku University、2.Samsung Electronics Co., LTD)

https://doi.org/10.7567/SSDM.2001.D-2-2

2001 International Conference on Solid State Devices and Materials

[D-2-2] Low-Power Data-Preserving Complementary Pass-Transistor-Based Circuit for Power-Down Circuit Scheme