A Block-Parallel SAR ADC for CMOS Image Sensor with 3-D Stacked Structure

K. Kiyoyama; K.W. Lee; T. Fukushima; H. Naganuma; H. Kobayashi; T. Tanaka; M. Koyanagi

doi:https://doi.org/10.7567/SSDM.2011.G-4-2

2011 International Conference on Solid State Devices and Materials

2011年9月27日〜 2011年9月30日
Aichi Industry & Labor Center (WINC AICHI), Nagoya, Japan

[G-4-2] A Block-Parallel SAR ADC for CMOS Image Sensor with 3-D Stacked Structure

K. Kiyoyama^1,2、K.W. Lee²、T. Fukushima²、H. Naganuma²、H. Kobayashi³、T. Tanaka²、M. Koyanagi² (1.Nagasaki Institute of Applied Science、2.Tohoku Univ.、3.ASET , Japan)

https://doi.org/10.7567/SSDM.2011.G-4-2

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