[18p-A4-1~18] 16.3 Bulk, thin-film and other silicon-based solar cells

[18p-A4-18] Identification of Trap Sites at Dielectric/Three-Dimensional Si Structure Interfaces

^○Tomoya Shoji¹, Kou Ishikawa¹, Kuniyuki Kakushima², Yoshinori Kataoka², Akira Nishiyama², Nobuyuki Sugii², Hitoshi Wakabayashi², Kazuo Tsutsui², Kenji Natori¹, Hiroshi Iwai¹ (Tokyo Tech. FRC¹, Tokyo Tech. IGSSE²)

Keywords:チャージポンピング法,界面準位,シリコン