[17p-PA1-1~16] 13.3 Si Process・Interconnect・MEMS・Integration

[17p-PA1-10] Study on Correlation between High-performance Poly-Si TFTs and its Channel Crystallity

^○Masayuki Yamano¹, Shin-Ichiro Kuroki¹, Tatsuaki Hirata¹, Tadashi Sato¹, Koji Kotani², Takamaro Kikkawa¹ (RNBS¹, Tohoku Univ.²)

Keywords:薄膜トランジスタ,ダブルラインビーム,ポリシリコン