The 75th JSAP Autumn Meeting, 2014

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Poster presentation

13. Semiconductors A (Silicon) » 13.3 Si Process・Interconnect・MEMS・Integration

[17p-PA1-1~16] 13.3 Si Process・Interconnect・MEMS・Integration

Wed. Sep 17, 2014 1:30 PM - 3:30 PM PA1 (Gymnasium1)

ポスター掲示時間13:30～15:30(PA1会場)

1:30 PM - 3:30 PM

[17p-PA1-15] Phase Diagram of Metal Germanide and Schottky Barrier Height at Germanide/Ge Interfaces

○(DC)Shota Iizuka1, Takashi Nakayama1 (Faculty of Science, Chiba Univ.1)

Keywords:第一原理計算,相図,ショットキーバリア