Oral presentation

13. Semiconductors A (Silicon) » 13.2 Insulator technology

[18p-D8-1~15] 13.2 Insulator technology

Tue. Mar 18, 2014 1:30 PM - 5:30 PM D8 (D215)

△：Young Scientist Oral Presentation Award Applied
▲：English Presentation
▼：Both Award Applied and English Presentation

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Lunch 12:15〜13:30 (12:15 PM - 1:30 PM)

1:30 PM - 1:45 PM

[18p-D8-1] Improvement of Interfacial Properties of High-k/Ge Gate Stacks by Post-Metal Anneal

^○Ryohei Tanaka¹, Iori Hideshima¹, Yuya Minoura¹, Akitaka Yoshigoe², Yuden Teraoka², Takuji Hosoi¹, Takayoshi Shimura¹, Heiji Watanabe¹ (Osaka Univ.¹, JAEA²)

1:45 PM - 2:00 PM

△ [18p-D8-2] Al/Ge Simultaneous Oxidation Process by using Oxygen Neutral Beam for Ge Gate Stack

^○Daiki Nakayama¹, Takeo Ohno², Masaki Kitajo¹, Seiji Samukawa^1,2 (IFS, Tohoku Univ.¹, WPI-AIMR, Tohoku Univ.²)

2:00 PM - 2:15 PM

[18p-D8-3] Low-temperature fabrication of Al2O3/Ge gate stacks using post plasma oxidation

^○Yuta Nagatomi¹, Yuichi Nagaoka¹, Kesuke Yamamoto², Dong Wang¹, Hiroshi Nakashima² (I-Eggs, Kyushu Univ.¹, KASTEC, Kyushu Univ.²)

2:15 PM - 2:30 PM

△ [18p-D8-4] Interface Engineering of HfO₂/Ge Gate Stack Structure by Rutile TiO₂ Inter Layer

^○Kazuyoshi Kobashi^1,2, Takahiro Nagata², Toshihide Nabatame², Yoshiyuki Yamashita², Atsushi Ogura¹, Toyohiro Chikyow² (Meiji Univ.¹, NIMS²)

2:30 PM - 2:45 PM

[18p-D8-5] Fabrication and Evaluation of GeO₂/Ge structure Using Kr/O₂ Plasma Oxidation

^○Yuya Nakatani¹, Marina Yamaguchi¹, Yoshitaka Iwasaki¹, Tomo Ueno¹ (Tokyo Univ. of Agri & Tech¹)

2:45 PM - 3:00 PM

△ [18p-D8-6] Physical Factor Determining Interface State Density of Gate-insulator/Ge Interface during Oxidation Process

^○Shigehisa Shibayama^1,2, Kimihiko Kato¹, Mitsuo Sakashita¹, Wakana Takeuchi¹, Noriyuki Taoka¹, Osamu Nakatsuka¹, Shigeaki Zaima¹ (Graduate School of Eng., Nagoya Univ.¹, JSPS Research Fellow²)

3:00 PM - 3:15 PM

[18p-D8-7] Quantitative evaluation of slow traps near Ge MOS interfaces by using time response of MOS capacitance

^○Katsuhisa Tanaka^1,2, Rui Zhang^1,2, Mitsuru Takenaka^1,2, Shinichi Takagi^1,2 (Univ. of Tokyo¹, JST-CREST²)

3:15 PM - 3:30 PM

△ [18p-D8-8] The impact of Ge composition on the improvement of the interface trap density at Al2O3/SiGe MOS interface with plasma post-nitridation

^○（M2）Jaehoon Han^1,2, Rui Zhang^1,2, Takenori Osada³, Masahiko Hata³, Mitsuru Takenaka^1,2, Shinichi Takagi^1,2 (Univ. of Tokyo¹, JST-CREST², Sumitomo Chemical Co. Ltd.³)

Break 15:30〜15:45 (3:30 PM - 3:45 PM)

3:45 PM - 4:00 PM

△ [18p-D8-9] Theoretical study for adsorption of tri-methyl aluminum molecule on GaN (0001) surface

^○Shunsuke Chikada¹, Masakazu Takao¹, Atsushi Honda¹, Shin'ichi Higai¹, Kousuke Shiratsuyu¹, Takashi Fujii¹ (Murata Manufacturing¹)

4:00 PM - 4:15 PM

△ [18p-D8-10] Robustness of Sn Precipitation at Ge_1-xSn_x Surface on Ge(001) during Thermal Oxidation

^○Kimihiko Kato¹, Takanori Asano¹, Noriyuki Taoka¹, Mitsuo Sakashita¹, Osamu Nakatsuka¹, Shigeaki Zaima¹ (Nagoya Univ.¹)

4:15 PM - 4:30 PM

△ [18p-D8-11] Study of the pre-deposition treatment for Al₂O₃/GaSb MOS structures

^○（M1）Takahiro Gotow^1,2, Sachie Fujikawa¹, Hiroki I. Fujishiro¹, Mutsuo Ogura², Tetsuji Yasuda², Tatsuro Maeda² (TUS¹, AIST²)

4:30 PM - 4:45 PM

[18p-D8-12] Impact of ALD process on of La₂O₃/InGaAs interface roughness

^○Hiroshi Omine¹, Dariush Hassan Zadeh¹, Kuniyuki Kakushima², Akira Nishiyama², Nobuyuki Sugii², Yoshinori Kataoka², Hitoshi Wakabayashi², Kazuo Tsutsui², Kenji Natori¹, Hiroshi Iwai¹ (FRC Tokyo Tech¹, IGSSE Tokyo Tech²)

4:45 PM - 5:00 PM

▲ [18p-D8-13] Ga2O3 and Al2O3 hybrid passivation for improving of HfO2/InGaAs MIS characteristics

^○Wipakorn Jevasuwan¹, Tatsuro Maeda¹, Noriyuki Miyata¹, Minuro Oda¹, Toshifumi Irisawa¹, Tsutomu Tezuka¹, Tetsuji Yasuda¹ (AIST¹)

5:00 PM - 5:15 PM

△ [18p-D8-14] Low D_it La₂O₃/In_0.53Ga_0.47As Gate Stack scaled to sub-nm CET

^○（PC）Daryoush Hassan Zadeh¹, Hiroshi Oomine¹, Kuniyuki Kakushima², Yoshinori Kataoka², Akira Nishiyama², Nobuyuki Sugii², Hitoshi Wakabayashi², Kazuo Tsutsui², Kenji Natori¹, Hiroshi Iwai¹ (Tokyo Tech. FRC¹, Tokyo Tech. IGSSE²)

5:15 PM - 5:30 PM

△ [18p-D8-15] Electron mobility improvement due to GaO_x passivation layer formed by pre-deposition anneal in HfO₂/In_0.53Ga_0.47As nMISFET with sub-1.0 nm EOT

^○Minoru Oda¹, Toshifumi Irisawa¹, Yuuichi Kamimuta¹, Jevasuwan Wipakorn¹, Tatsuro Maeda¹, Osamu Ichikawa², Toshio Ishihara², Osada Takenori², Tsutomu Tezuka¹ (AIST-GNC¹, Sumitomo Chemical Co. Ltd.²)

Session information

[18p-D8-1~15] 13.2 Insulator technology

[18p-D8-1] Improvement of Interfacial Properties of High-k/Ge Gate Stacks by Post-Metal Anneal

△ [18p-D8-2] Al/Ge Simultaneous Oxidation Process by using Oxygen Neutral Beam for Ge Gate Stack

[18p-D8-3] Low-temperature fabrication of Al2O3/Ge gate stacks using post plasma oxidation

△ [18p-D8-4] Interface Engineering of HfO2/Ge Gate Stack Structure by Rutile TiO2 Inter Layer

[18p-D8-5] Fabrication and Evaluation of GeO2/Ge structure Using Kr/O2 Plasma Oxidation