Feasibility Study of ON Current Enhancement of TFETs by Utilizing Isovalent Traps

Presentation information

Oral presentation

13. Semiconductors A (Silicon) » 13.4 Devices/Integration Technologies

Wed. Mar 19, 2014 9:00 AM - 12:30 PM F12 (F408)

12:00 PM - 12:15 PM

^○Takahiro Mori¹, Yukinori Morita¹, Noriyuki Miyata¹, Shinji Migita¹, Meishoku Masahara¹, Tetsuji Yasuda¹, Hiroyuki Ota¹ (GNC-AIST¹)

Keywords:トンネルトランジスタ