The 61st JSAP Spring Meeting, 2014

Presentation information

Oral presentation

13. Semiconductors A (Silicon) » 13.3 Si Process・Interconnect・MEMS・Integration

[19p-E14-1~21] 13.3 Si Process・Interconnect・MEMS・Integration

Wed. Mar 19, 2014 1:15 PM - 6:45 PM E14 (E302)

6:30 PM - 6:45 PM

[19p-E14-21] Development of a 3D-IC Tester for Minimal 3D-IC Fab

Naoya Watanabe1, Kenji Kawano2, Michiyuki Eto2, Shiro Hara1, Masahiro Aoyagi1 (AIST1, STK Technology2)

Keywords:3次元集積回路,ミニマルファブ,テスター