The 61st JSAP Spring Meeting, 2014

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13. Semiconductors A (Silicon) » 13.4 Devices/Integration Technologies

[20a-F12-1~13] 13.4 Devices/Integration Technologies

Thu. Mar 20, 2014 9:00 AM - 12:30 PM F12 (F408)

9:15 AM - 9:30 AM

[20a-F12-2] An Optimum Asymmetric Coding Strategy to Improve Program-Disturb Error in 2X, 3X and 4Xnm NAND Flash Memories

○（M1）Masafumi Doi1, Shuhei Tanakamaru1,2, Ken Takeuchi1 (Chuo Univ.1, Univ. of Tokyo2)

Keywords:NANDフラッシュメモリ,非対称符号,書き込みディスターブエラー