[15a-PB4-1~9] 13.4 Si wafer processing /MEMS/Integration technology

△ [15a-PB4-9] LT Metal Double-Gate Junctionless P-channel Poly-Ge TFT with High-k Gate Dielectric on Glass Substrate

〇Yuya Nishimura¹, Syota Nibe¹, Akito Hara¹ (1.Tohoku Gakuin Univ.)

Keywords:semiconductor,Ge,TFT

The aim of our research is fabrication of planar metal double gate low-temperature (LT) poly-Ge TFT with high-k gate dielectric. We achieved four times increment of on/off ratio compared to that in our JSAP report in 2015 spring meeting (13a-P14-6) by thinning poly-Ge film thickness (25 nm) and optimization of SPC condition.