The 76th JSAP Autumn Meeting, 2015

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

[16a-1C-1~11] 13.5 Semiconductor devices and related technologies

Wed. Sep 16, 2015 9:00 AM - 12:00 PM 1C (135)

座長:太田 裕之(産総研)

9:15 AM - 9:30 AM

[16a-1C-2] Introduction of SiGe/Si Hetero-Tunnel-Junction into Multilayer Tunnel FinFETs

〇Yukinori Morita1, Koichi Fukuda1, Takahiro Mori1, Wataru Mizubayashi1, Shinji Migita1, Kazuhiko Endo1, Shin-ichi O'uchi1, Yongxun Liu1, Meishoku Masahara1, Takashi Matsukawa1, Hiroyuki Ota1 (1.AIST)

Keywords:tunnel FET,SiGe,FinFET

Tunnel FinFETs equipped with SiGe/Si heterojunction and multilayer fin-channel has been experimentally demonstrated. High quality SiGe layer is epitaxially grown on heavily doped Si source. SiGe/Si hetero-multilayer fin-channel with trigate configuration significantly enhances the drain current comparing with the conventional SiGe/Si heterojunction parallel-plate TFET.