The 76th JSAP Autumn Meeting, 2015

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

[16a-1C-1~11] 13.5 Semiconductor devices and related technologies

Wed. Sep 16, 2015 9:00 AM - 12:00 PM 1C (135)

座長:太田 裕之(産総研)

10:45 AM - 11:00 AM

[16a-1C-7] On the Device Design for Steep Slope Negative Capacitance FET (NCFET) Toward Sub-0.2V operation

〇Masaharu Kobayashi1, Toshiro Hiramoto1 (1.IIS, The Univ. of Tokyo)

Keywords:transistor,negative capacitance,ferroelectric

Steep slope negative capacitance FET (NCFET) has been a promising candidate as new CMOS platform for future IoT technology. In this work, we have proposed an NCFET with ferroelectric HfO2 thin film. We have provided device design guideline for hysteresis-free and highly energy-efficient NCFET at less than Vdd 0.2V to determine optimum ferroelectric material parameters.