Naoto Matsuo

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Speaker, Author, Co-Author

Wed. Sep 14, 2016 1:30 PM - 3:30 PM P6 (Exhibition Hall)

Poster presentation
| 13 Semiconductors
| 13.5 Semiconductor devices and related technologies

[14p-P6-1~11] 13.5 Semiconductor devices and related technologies

1:30 PM - 3:30 PM

[14p-P6-5] Feasibility of inverter with non-power consumption by DNA/Si-MOSFET
and controlled parasitic capacitance

〇Naoto Matsuo¹, Hibiki Nakano¹, Akira Heya¹, Tadao Takada¹, Kazushige Yamana¹, Tadashi Sato², Shin Yokoyama² (1.Univ. Hyogo, 2.Hiroshima Univ.)