[19p-P3-1~7] 13.3 Insulator technology

[19p-P3-4] Development of Deposition Technology of Gate SiO₂ Layer for GaN Power Transistors

Shota Takagi¹, Tetsuji Arai¹, Keisuke Arimoto¹, Junji Yamanaka¹, 〇Kiyokazu Nakagawa¹, Toshiyuki Takamatsu², Katsunori Ueno³ (1.Univ. Yamanashi, 2.SST, 3.Fuji Ele.)

Keywords:GaN,gate insulator,SiO2