DAIKI UEDA

→ Search for DAIKI UEDA in Google Scholar

Speaker, Author, Co-Author

Fri. Sep 8, 2017 9:00 AM - 12:15 PM C18 (C18)

Oral presentation
| 13 Semiconductors
| 13.5 Semiconductor devices and related technologies

[8a-C18-1~12] 13.5 Semiconductor devices and related technologies

6.1と13.3と13.5のコードシェアセッションあり

10:15 AM - 10:30 AM

[8a-C18-6] Voltage-based Equivalent Circuit Model of MOS-Gated Thyristor for Optimizing Steep Subthreshold Slope PN-Body Tied SOI FET

〇(M2)DAIKI UEDA¹, KIYOSHI TAKEUCHI¹, MASAHARU KOBAYASHI¹, TOSHIRO HIRAMOTO¹ (1.IIS, Univ. of Tokyo)