Hideaki Nakajima

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Speaker, Author, Co-Author

Tue. Mar 14, 2017 1:30 PM - 3:30 PM P3 (BP)

Poster presentation
| 13 Semiconductors
| 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

[14p-P3-1~19] 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

1:30 PM - 3:30 PM

[14p-P3-15] Young’s Modulus Evaluation of Electroplated Ti/Au Structures by Multi-layer Metal Technology (2)

〇Hideaki Nakajima^1,2, Tso-Fu Mark Chang^1,2, Chun-Yi Chen^1,2, Toshifumi Konishi³, Katsuyuki Machida^1,2,3, Hiroshi Toshiyoshi^2,4, Daisuke Yamane^1,2, Kazuya Masu^1,2, Masato Sone^1,2 (1.Tokyo Tech, 2.JST-CREST, 3.NTT-AT, 4.Tokyo Univ.)

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