The 64th JSAP Spring Meeting, 2017

Presentation information

Oral presentation

13 Semiconductors » 13.8 Compound and power electron devices and process technology

[15p-315-1~17] 13.8 Compound and power electron devices and process technology

Wed. Mar 15, 2017 1:15 PM - 5:45 PM 315 (315)

Naoteru Shigekawa(Osaka City Univ.), Hiroshi Okada(Toyohashi Univ. of Tech.)

4:45 PM - 5:00 PM

[15p-315-14] Enhancement-mode Ga2O3 MOSFETs with Si-Ion-Implanted Source and Drain

ManHoi Wong1, Yoshiaki Nakata1, Akito Kuramata2, Shigenobu Yamakoshi2, Masataka Higashiwaki1 (1.NICT, 2.Tamura Corp.)

Keywords:Ga2O3, MOSFET, enhancement-mode

Power converters favor normally-off switches for safety and simplified circuit topologies. Enhancement-mode Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs) reported to date employ relatively high channel doping intended for maintaining volume current density, which imposes constraints on the device dimensions or architecture to realize positive threshold voltage while limiting conductance in the ungated access regions. This work demonstrates enhancement-mode Ga2O3 MOSFETs with an unintentionally-doped Ga2O3 channel, whose low background carrier density offers improved design flexibility and reduced process complexity for achieving full channel depletion at a gate bias of 0 V. Low source/drain series resistances were realized by Si-ion implantation. MOSFETs with a channel length of 4 μm delivered a maximum drain current density (IDS) of 1.4 mA/mm and an IDS on/off ratio near 106.