The 64th JSAP Spring Meeting, 2017

Presentation information

Poster presentation

13 Semiconductors » 13.8 Compound and power electron devices and process technology

[16a-P4-1~29] 13.8 Compound and power electron devices and process technology

Thu. Mar 16, 2017 9:30 AM - 11:30 AM P4 (BP)

9:30 AM - 11:30 AM

[16a-P4-2] DLTS studies of traps in MOCVDp++p-n+GaN on GaN substrate

〇(B)Tatsuya Kogiso1, Shougo Ueda1, Yutaka Tokuda1, Tetsuo Narita2, Kazuyoshi Tomita2, Tetsu Kachi3 (1.Aichi Inst. of Technol., 2.Toyota Central R&D Labs.,Inc., 3.Nagoya University)

Keywords:p-GaN, DLTS

We have studied traps in p-GaN using the p++p-n+ junction grown by MOCVD on n+-GaN substrate with DLTS measurements. Four hole traps labelled Ha, Hb, Hc and Hd are observed in MOCVD p-GaN. However, to determine trap parameters Ha and Hb whose peaks are below 170 K, low-frequency capacitance DLTS must be employed due to freeze-out of Mg acceptors. The energy levels of trap Hc and Hd are Ev+0.46 and 0.88 eV, respectively with the trap concentration of 1.6x1015 and 2.4x1016 cm-3. The energy level of Hd is close to that of H1 observed in MOCVD n-GaN.