Oral presentation

[21a-212B-1~11] 11.5 Junction and circuit fabrication process, digital applications

Fri. Sep 21, 2018 9:00 AM - 12:00 PM 212B (212-2)

Masamitsu Tanaka(Nagoya Univ.), Yuki Yamanashi(Yokohama National Univ.)

△：Presentation by Applicant for JSAP Young Scientists Presentation Award
▲：English Presentation
▼：Both of Above
No Mark：None of Above

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9:00 AM - 9:15 AM

[21a-212B-1] Monolithic integration of SFQ circuits and a nanocryotron

〇(M2)Kohei Maruyama¹, Kyosuke Sano¹, Masamitsu Tanaka¹, Taro Yamashita^1,2, Masumi Inoue³, Akira Fujimaki¹ (1.Nagoya Univ., 2.JST-PREST, 3.Meijo Univ.)

9:15 AM - 9:30 AM

[21a-212B-2] Analysis of influence of 1/f noises on superconducting circuit operation

〇Yusuke Tsuna¹, Yuki Yamanashi¹, Nobuyuki Yoshikawa¹ (1.Yokohama Nat'l Univ.)

9:30 AM - 9:45 AM

[21a-212B-3] Fabrication of Toggle Flip-Flop based on Ferromagnetic π Josephson junctions

〇(M2)Tomohiro Kamiya¹, Yuto Takeshita¹, Kyosuke Sano¹, Masamitsu Tanaka¹, Taro Yamashita^1,2, Akira Fujimaki¹ (1.Nagoya Univ., 2.JST-PRESTO)

9:45 AM - 10:00 AM

[21a-212B-4] Demonstration of a 32 × 32-ch SFQ event-driven encoder for a 1 k pixel SSPD array system

〇Shigeyuki Miyajima¹, Masahiro Yabuno¹, Shigehito Miki^1,2, Hirotaka Terai¹ (1.NICT, 2.Kobe Univ.)

10:00 AM - 10:15 AM

▲ [21a-212B-5] Design of superconducting LC delay network for adiabatic quantum-flux-parametron logic

〇Yuxing He¹, Naoki Takeuchi^1,3, Nobuyuki Yoshikawa^1,2 (1.Inst. Adv. Sci., Yokohama Natl. Univ., 2.Dept. of Elec. and Comp. Eng., Yokohama Natl. Univ., 3.JST-PRESTO)

10:15 AM - 10:30 AM

[21a-212B-6] Low-Energy Signal Transmission using Half-Single-Flux-Quantum

〇Masamitsu Tanaka¹, Yuta Yoshinomoto¹, Tomohiro Kamiya¹, Kyosuke Sano¹, Taro Yamashita^1,2, Akira Fujimaki¹ (1.Nagoya Univ., 2.JST-PRESTO)

10:45 AM - 11:00 AM

△ [21a-212B-7] Consideration of latency reduction of AQFP circuits using delayed clocking scheme

〇(M2)Mai Nozoe¹, Naoki Takeuchi^2,3, Christopher Ayala², Yuki Yamanashi^1,2, Nobuyuki Yoshikawa^1,2 (1.Yokohama Natl. Univ., 2.IAS, Yokohama Natl. Univ., 3.JST-PRESTO)

11:00 AM - 11:15 AM

△ [21a-212B-8] Area Reduction of Adiabatic Quantum Flux Parametron Register Files by Using Asymmetric AND Gates

〇(M1)Tomohiro Tamura¹, Naoki Takeuchi^2,3, Christopher Ayala², Yuki Yamanashi^1,2, Nobuyuki Yoshikawa^1,2 (1.Dept. of Electrical and Computer Eng., Yokohama Natl. Univ., 2.IAS, Yokohama Natl. Univ., 3.JST-PRESTO)

11:15 AM - 11:30 AM

△ [21a-212B-9] Fabrication of ferromagnetic Josephson junctions on Si substrate with TiN buffer for superconducting qubit

〇Haruki Kato¹, Tomohiro Kamiya¹, Sunmi Kim², Qiu Wei², Akira Kawakami², Hirotaka Terai², Koichi Semba², Taro Yamashita^1,3, Akira Fujimaki¹ (1.Nagoya Univ., 2.NICT, 3.JST-PRESTO)

11:30 AM - 11:45 AM

△ [21a-212B-10] Demonstration of reversible full adders using adiabatic quantum flux parametron logic

〇Taiki Yamae¹, Naoki Takeuchi^2,3, Yuki Yamanashi^1,2, Nobuyuki Yoshikawa^1,2 (1.Dept. of Electrical and Computer Eng., Yokohama Natl. Univ., 2.IAS, Yokohama Natl. Univ., 3.JST-PRESTO)

11:45 AM - 12:00 PM

[21a-212B-11] Development of matrix memory driven by SFQ pulses

〇Yuto Takeshita¹, Tomohiro Kamiya¹, Masamitsu Tanaka¹, Taro Yamashita^1,2, Akira Fujimaki¹ (1.Nagoya Univ., 2.JST PRESTO)

Sessions

11 Superconductivity » 11.5 Junction and circuit fabrication process, digital applications