5:00 PM - 5:30 PM
[19p-233-10] Ultralow Power Si CMOS Logic Circuit Enabled by Ferroelectric Material
Keywords:ferroelectric, low power, negative capacitance
Presentation information
Symposium (Oral)
Symposium » Create a path of future semiconductor devices by new materials and processes
[19p-233-1~12] Create a path of future semiconductor devices by new materials and processes
Wed. Sep 19, 2018 1:30 PM - 5:50 PM 233 (233)
Akio Ohta(Nagoya Univ.), Noriyuki Taoka(AIST)