Kodai Shuto

→ Search for Kodai Shuto in Google Scholar

Speaker, Author, Co-Author

Sat. Mar 17, 2018 1:45 PM - 6:15 PM F206 (61-206)

Oral presentation
| 13 Semiconductors
| 13.3 Insulator technology

[17p-F206-1~17] 13.3 Insulator technology

4:00 PM - 4:15 PM

△ [17p-F206-9] Interface trap density of high-k gate stack using Flash Lamp Annealing (FLA) under NH₃ ambient

〇Kodai Shuto¹, Taiho Yoshinaka¹, Ryo Suemasa¹, Hikaru Kawarazaki², Takayuki Aoyama², Shinichi Kato², Yasuo Nara¹ (1.Univ. of Hyogo, 2.SCREEN Semiconductor Solutions Co.)