Toshiki Nakamura

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Speaker, Author, Co-Author

Sun. Mar 18, 2018 1:15 PM - 6:00 PM G203 (63-203)

Oral presentation
| 13 Semiconductors
| 13.5 Semiconductor devices and related technologies

[18p-G203-1~18] 13.5 Semiconductor devices and related technologies

5:00 PM - 5:15 PM

[18p-G203-15] Burst Error Reduction for Improvement of LDPC Correction Capability in TLC NAND Flash Memories

〇Toshiki Nakamura¹, Yoshiaki Deguchi¹, Ken Takeuchi¹ (1.Chuo Univ.)