The 65h JSAP Spring Meeting, 2018

Presentation information

Oral presentation

3 Optics and Photonics » 3.15 Silicon photonics

[18a-B201-1~8] 3.15 Silicon photonics

Sun. Mar 18, 2018 9:30 AM - 11:45 AM B201 (53-201)

Yuya Shoji(Titech), Youichi Sakakibara(AIST)

9:45 AM - 10:00 AM

[18a-B201-2] Very short, low-loss, broadband on-chip linear optical logic gates

Shota Kita1,2, Kengo Nozaki1,2, Kenta Takata1,2, Akihiko Shinya1,2, Masaya Notomi1,2 (1.NTT Nanophotonics Center, 2.NTT BRL)

Keywords:Optical logic gates, Linear optics, Silicon photonics

We experimentally demonstrate a very short, low-loss, and broadband on-chip linear optical logic gate. By tuning a bias input of a Y+1 gate integrated with silicon photonics, we observed AND/NOR operations with the binary contrast of > 9 dB. This may be crucial as one of components in low-latency computational circuits exceeding physical limitations of conventional electronic circuits.