The 65h JSAP Spring Meeting, 2018

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

[18a-G203-1~10] 13.5 Semiconductor devices and related technologies

Sun. Mar 18, 2018 9:00 AM - 12:15 PM G203 (63-203)

Shinji Migita(AIST)

9:30 AM - 9:45 AM

[18a-G203-3] Fabrication of InGaAs Nanosheet Transistors

Toru Kanazawa1, Kazuto Ohsawa1, Tomohiro Amemiya1, Nobukazu Kise1, Ryosuke Aonuma1, Yasuyuki Miyamoto1 (1.Tokyo Tech)

Keywords:MOSFET, III-V compound semicondeuctor, Nanosheet

The multi-gate structure is promising to achieve extremely scaled and low power transistors with suppressed short channel effects. Vertically stacked nanosheet transistor is a novel 3D device structure proposed recently. Here we report the fabrication and characterization of the stacked InGaAs nanosheet transistors with high electron mobility III-V semiconductor channels and heavily n-doped epitaxial source.