The 65h JSAP Spring Meeting, 2018

Presentation information

Symposium (Oral)

Symposium » Is Ge substituting for Si?

[19p-G203-1~7] Is Ge substituting for Si?

Mon. Mar 19, 2018 1:30 PM - 5:10 PM G203 (63-203)

Toshifumi Irisawa(AIST), Tsutomu Tezuka(TOSHIBA), Kazuhiko Endo(AIST)

4:10 PM - 4:40 PM

[19p-G203-6] Atomic Layer Defect-free Ge Fin Fabrication by Neutral Beam Processes

Seiji Samukawa1,2 (1.AIMR, Tohoku Univ., 2.IFS, Tohoku Univ.)

Keywords:Semiconductor Devices, Ge Fin FET, Atomic Layer Defect-free Process

High performance of Si complementary metal–oxide–semiconductor (CMOS) devices has been realized by their miniaturization. The gate length of advanced CMOS field-effect transistors (CMOSFETs) has become smaller than 20 nm. To improve the performance of nanometer-scale CMOSFETs, in addition to performing their miniaturization, it is also necessary to replace the Si channel with high-mobility materials such as Ge and III–V compounds. In particular, since the carrier (electron and hole) mobility in Ge is higher than that in Si. Ge is a promising high mobility channel. Furthermore, a multi-channel is required to improve the electrostatic control of the gate electrode of Ge MOS FETs (MOSFETs). There are three main methods of Ge fin fabrication: epitaxial growth of Ge from a SiGe=Si substrate, conventional top-down etching and Ge oxide formation. Fin structure fabrication in Ge fin FETs (FinFETs) on Ge-on-insulator (GeOI) substrates is usually performed by inductively coupled plasma (ICP) etching. However, during ICP etching, the UV light generated from the ICP and charge build-up by ionized atoms cause plasma-induced damage. A concern here is that such etching damage reduces the performance and reliability of Ge-channel CMOS devices. In particular, since the thermal resistance of Ge is very low compared to that of Si, the inability to recover the damage by high-temperature thermal annealing (≥1000 °C) is a critical issue. Additionally, in case of using thermal oxidation process for GeOx formation on Ge fin sidewall, their mobility readily deteriorates because of the instability of the Ge-oxide/Ge interface. It is well known that Ge oxide has poor thermal stability, which causes an increase in its interface state density. In this paper, I discuss about the impacts of plasma-induced damages due to UV light irradiation during plasma etching and advantages of neutral beam processes for atomic layer defect-free etching and oxidation processes on Ge fin fabrication.