[18a-B11-1~11] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[18a-B11-7] Design and performance of Flip-Flops configured with piezoelectronic transistors

〇Yusaku Shiotsu¹, Shuu'ichirou Yamamoto¹, Hiroshi Funakubo², Minoru Kuribayashi Kurosawa³, Satoshi Sugahara¹ (1.FIRST, Tokyo Inst of Tech, 2.Sch. of Mater. and Chem. Tech., Tokyo Inst of Tech, 3.Sch. of Eng., Tokyo Inst of Tech)

Keywords:Piezoelectronic transistor, Flip-flop