[20p-C213-1~14] 11.5 Junction and circuit fabrication process, digital applications

[20p-C213-9] Low-latency operation of adiabatic quantum-flux-parametron using delay-line clocking

〇Naoki Takeuchi¹, Yuxing He¹, Nobuyuki Yoshikawa¹ (1.Yokohama Natl. Univ.)

Keywords:quantum flux parametron, adiabatic logic, low latency

Adiabatic quantum-flux-parametron (AQFP) logic is an energy-efficient superconductor logic family, and thus is investigated for applications such as interface circuits for superconducting detectors and quantum bits. Since AQFP circuits are driven by multi-phase ac currents, AQFP logic has somewhat long latency. In this study, we propose a low-latency clocking scheme for AQFP logic and demonstrate low-latency operation (10 ps per gate) in the experiment.