[11p-M136-1~14] 13.3 Insulator technology

▼ [11p-M136-8] Impact of metal gate electrodes on electrical properties of Y₂O₃/Si_0.78Ge_0.22 gate stacks

〇(D)TsungEn Lee¹, Mitsuru Takenaka¹, Shinichi Takagi¹ (1.Univ. of Tokyo)

Keywords:Silicon Germanium, high-k, interface trap density

A SiGe MOSFET is a promising solution to realize high performance LSIs under the traditional scaling by the Moore's law. Strained SiGe grown on Si has larger hole mobility and smaller hole effective mass than Si. A strong concern on SiGe pFETs is the relatively high interface trap density (Dit) at SiGe MOS interfaces, which might be attributed to the undesired GeO_x formation in interfacial layers (IL)[1]. For high-k materials, Y₂O₃-based materials are promising for superior SiGe MOS interfaces [2]. We have found that increasing post metal annealing (PMA) temperature is beneficial to improve the interface properties of SiGe with the TiN/Y₂O₃ gate stack [3]. The TiN gate with PMA at 450^oC can yield superior interface properties between Y₂O₃ and SiGe. In this work, we examine the impact of different gate electrodes on MOS characteristics of the Y₂O₃/SiGe gate stacks with different PMA temperature. Metal gates of Al, Au, W and TiN are used for this study.