2019年第66回応用物理学会春季学術講演会

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31 フォーカストセッション「AIエレクトロニクス」 » 31.1 フォーカストセッション「AIエレクトロニクス」

[12a-PA4-1~9] 31.1 フォーカストセッション「AIエレクトロニクス」

2019年3月12日(火) 09:30 〜 11:30 PA4 (屋内運動場)

09:30 〜 11:30

[12a-PA4-4] Analog-cores appropriate to the spiking neural-networks

Rie Sato1、Koichi Mizushima1 (1.Toshiba R&D Center)

キーワード:spiking neural-networks, analog memory

The spiking neural-network is an energy-saving computer capable of parallel-distributed processing, consisting of many cores, each including an arithmetic unit and memory. Memory in the cores store temporary states xj of neurons as well as synapse parameters wij, which indicate connectivity among neurons. The arithmetic unit performs mainly multiply-and-add calculations of wij and xj .
Although static random access memory (SRAM) and a digital arithmetic unit are normally used in the core, energy-efficiency is expected to be much improved by employing magnetic technologies such as race-track memories and skyrmion tracks1. Another method for energy-saving is the adoption of a core composed of an analog memory and arithmetic unit2. To reduce the degradation of performance in analog-cores caused by scattering in the transistor characteristics, the authors introduce an analog memory cell in which a floating diffusion amplifier (FD Amp.) is included. The circuit has been used for the image cell in the CCD and CMOS sensors, in which charge induced in a photodiode is transformed to voltage using FD Amp. In this memory the photodiode is replaced by the capacitor formed by pn junction. The correlated double sampling circuits (CDS) can be used to suppress the fixed noises in the voltage signal.
1. K. Mizushima, H. Goto, and R. Sato, “Large-scale Ising-machines composed of magnetic neurons”, Appl. Phys. Lett. 111, 172406, 2017.
2. J. Hasler and H. B. Marr, “Finding a roadmap to achieve large neuromorphic hardware systems”, Front Neurosci., 7, 1, 2013.