[11a-Z09-1~12] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[11a-Z09-12] Proposal of a new ultralow-voltage-retention Flip-Flops

〇Kenichiro Takiguchi¹, Daiki Kitagata¹, Tsubasa Matsuzaki¹, Shuu'ichirou Yamamoto¹, Satoshi Sugahara¹ (1.FIRST, Tokyo Inst. of Tech)

Keywords:Power gating, Flip-Flop, Low static power