The 81st JSAP Autumn Meeting, 2020

Presentation information

Oral presentation

11 Superconductivity » 11.5 Junction and circuit fabrication process, digital applications

[8a-Z24-1~9] 11.5 Junction and circuit fabrication process, digital applications

Tue. Sep 8, 2020 9:30 AM - 11:45 AM Z24

Fumihiro China(NICT)

10:45 AM - 11:00 AM

[8a-Z24-6] Applications of a Redesigned RSFQ NOT Gate to Multi-Input Negative Logic Gates

Koki Yamazaki1, Hiroshi Shimada1, 〇Yoshinao Mizugaki1 (1.UEC Tokyo)

Keywords:superconducting digital circuits, Nb integration circuits, RSFQ

We redesigned a NOT gate in the CONNECT cell library for RSFQ logic circuits. The area occupation of a NOT gate was reduced to the half of that in the library. A test circuit fabricated using Nb integration technology was tested and correct operation was confirmed. 2-input NOR, NAND, and XNOR gates were also designed and tested, for which correct operations were also confirmed.