[12p-N304-1~14] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[12p-N304-8] Proposal and performance prediction of a BNN accelerator using ULVR-SRAM

〇Yusaku Shiotsu¹, Shuu'ichirou Yamamoto¹, Satoshi Sugahara¹ (1.FIRST, Tokyo Inst. of Tech.)

Keywords:binarized neural network accelerator, power gating, low power