The 68th JSAP Spring Meeting 2021

Presentation information

Symposium (Oral)

Symposium » Power device technology trends and future prospects

[16p-Z07-1~11] Power device technology trends and future prospects

Tue. Mar 16, 2021 1:30 PM - 5:30 PM Z07 (Z07)

Takashi Kanemura(MIRISE Technologies), Takashi Tsuno(住友電気工業株式会社)

5:15 PM - 5:30 PM

[16p-Z07-11] 1.3 kV normally-off β-Ga2O3 vertical transistor with HfO2 gate-insulator

Daiki Wakimoto1, Chia-Hung Lin1, Quang Tu Thieu1, Hironobu Miyamoto1, Kohei Sasaki1, Akito Kuramata1 (1.Novel Crystal Tech.)

Keywords:Gallium Oxide, MOS transistor, HfO2

Vertical β-Ga2O3 FinFETs are developed employing high-k HfO2 as gate-insulator. The donor concentration of 1.7 x 1016 cm-3 and thickness of 10 μm in the n-drift region allows three terminal breakdown voltages up to 1.3 kV. The devices operate in the enhancement mode with a threshold voltage of ~0.4 V, an on-resistance of ~9.8 mW.cm2, and an output current of 310 A/cm2 which are calculated using the effective conduction width of ~10 μm considering current spreading in the drift region.