2021年第68回応用物理学会春季学術講演会

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CS コードシェアセッション » 【CS.5】 6.1 強誘電体薄膜、13.3 絶縁膜技術、13.5 デバイス/配線/集積化技術のコードシェアセッション

[16p-Z26-1~15] CS.5 6.1 強誘電体薄膜、13.3 絶縁膜技術、13.5 デバイス/配線/集積化技術のコードシェアセッション

2021年3月16日(火) 13:30 〜 17:30 Z26 (Z26)

藤村 紀文(阪府大)、徳光 永輔(北陸先端大)

13:45 〜 14:00

[16p-Z26-2] Comparative Study on Memory Characteristics of Ferroelectric-HfO2 Transistors with Different Structure of Oxide-Semiconductor Channel

FEI MO1、Takuya Saraya1、Toshiro Hiramoto1、Masaharu Kobayashi1 (1.Institute of Industrial Science, the University of Tokyo)

キーワード:Oxide-semiconductor channel, Ferroelectric, memory

Recently, ferroelectric-HfO2 FET memories have attracted more attentions, because of its good CMOS compatibility, non-destructive readout, low power consumption and high program/erase speed. Among several FeFETs, oxide-semiconductor channel FeFET is a promising candidate for memory and neuromorphic applications, thanks to BEOL-compatible process and high endurance. However, the memory operation is affected by the floating body channel and the availability of minority carriers of oxide-semiconductor. Thus, memory characteristic of oxide-semiconductor FeFET is significantly dependent of the device structure, which has not been discussed in detail, yet.
In this paper, we investigated four structures of FE-HfO2 FET by TCAD simulation including single gate planar, gate planar, nanowire and macaroni structures. Channel thickness and channel length dependence of memory window for each structure are compared and discussed.