3:15 PM - 3:30 PM ▲ [20p-B101-5] Reduction of Write Error Rate in Voltage-Induced Heavily-Damped Precessional Switching by Elliptic Cylinder Shaped Recording Layer 〇Rie Matsumoto1, Shinji Yuasa1, Hiroshi Imamura1 (1.AIST RCECT)