The 83rd JSAP Autumn Meeting 2022

Presentation information

Oral presentation

3 Optics and Photonics » 3.14 Silicon photonics and integrated photonics (formerly 3.15)

[21p-A205-1~21] 3.14 Silicon photonics and integrated photonics (formerly 3.15)

Wed. Sep 21, 2022 1:00 PM - 6:45 PM A205 (A205)

Makoto Okano(AIST), Shota Kita(NTT), Hirohito Yamada(Tohoku Univ)

4:15 PM - 4:30 PM

[21p-A205-13] High-responsivity, Low-capacitance Si Slot Hybrid Waveguide Photodetector using Ultrathin InGaAs Membrane

Tomohiro Akazawa1, Dongrui Wu1, Kei Sumita1, Naoki Sekine1, Makoto Okano2, Kasidit Toprasertpong1, Shinichi Takagi1, Mitsuru Takenaka1 (1.The Univ. of Tokyo, 2.AIST)

Keywords:Silicon Photonics, Photodetector

Optical interconnects have been widely implemented into shorter scales such as rack-to-rack communications in a data center due to their high-speed performance, but the power consumption of the receiver system has become an issue. Since the receiver system consists of a photodetector (PD) and TIA and consumes a large amount of power due to the electrical amplification, a "receiver-less" method which directly converts photocurrent to voltage signals with a high load resistance has been proposed. However, to achieve RC bandwidth more than 10 GHz while maintaining sufficient voltage swing, the PD capacitance must be on the order of 1 fF. Although a PD with high responsivity and low capacitance using InP photonic crystals has been reported, its integration with a Si photonics platform remains to be difficult. In this study, we report a Si hybrid PD consisting of an ultrathin InGaAs membrane bonded onto a Si slot waveguide, which enables high responsivity and low capacitance.