3:45 PM - 4:00 PM
[21p-C105-9] Accurate Evaluation of Interface Trap Density at InAs MOS Interfaces by C-V Measurements at Low Temperatures
Keywords:semiconductor, InAs, MOSFET
A method of accurately evaluating the interface trap density (Dit) by using the high-frequency C-V curves at InAs MOS interfaces is experimentally examined. Low-temperature measurements are performed to suppress the response of interface states. We study the impacts of the accuracy of the oxide capacitance, the distribution function, and the C-V hysteresis due to slow traps on Dit evaluated by the high-frequency C-V (Terman) method. It is found that temperatures lower than 40 K and the C-V measurements in limited voltage ranges are indispensable in the accurate evaluation of Dit.