[24a-E302-1~13] CS.9 Code-sharing Session of 13.7 & 15.6

[24a-E302-9] Characterization for trap states of SiO₂/GaN interfaces and SiO₂ films by DLTS

〇Shingo Ogawa¹, Hidetoshi Mizobata², Takuma Kobayashi², Takayoshi Shimura², Heiji Watanabe² (1.Toray Research Center, 2.Osaka Univ.)

Keywords:GaN, DLTS, trap states

We have characterized the trap states near SiO₂/n-GaN interface in GaN-MOS devices by DLTS. The trap state (E1) with 0.3 eV from the conduction band edge was detected for the sample of “as-depo.”. As the intensity of E1 increased with the longer pulse time of the DLTS measurement, E1 possibly locates not only at the SiO₂/GaN interface but also in the SiO₂ film. The intensity of the DLTS spectrum was drastically decreased after annealing, indicating the reduction of the trap states with around 1×10¹⁰ cm^-2eV^-1.