Xingyu Huang

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Speaker, Author, Co-Author

Thu. Mar 16, 2023 1:00 PM - 6:45 PM A403 (Building No. 6)

Oral presentation
| 13 Semiconductors
| 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[16p-A403-1~20] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

3:15 PM - 3:30 PM

▼ [16p-A403-8] A Simulation Study on Memory Characteristics of Oxide-Semiconductor Channel Antiferroelectric FETs Using Half-Loop Hysteresis

〇(M2)Xingyu Huang¹, Yuki Itoya¹, Zhuo Li¹, Takuya Saraya¹, Toshiro Hiramoto¹, Masaharu Kobayashi^1,2 (1.IIS., Univ. of Tokyo, 2.d.lab, Univ. of Tokyo)

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