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Symposium » 【Open Symposium】Connection : From BEOL to Tiplet, and to the Future **In corporation with The Japan Institute of Electronics Packaging (JIEP)

Symposium (Oral)

[16a-E302-1~6] 【Open Symposium】Connection : From BEOL to Tiplet, and to the Future **In corporation with The Japan Institute of Electronics
Packaging (JIEP)

Thu. Mar 16, 2023 9:00 AM - 12:10 PM E302 (Building No. 12)

Noriaki Matsunaga(Applied Materials Japan), Yasumitsu Orii(Rapidus), Fumihiro Inoue(YNU)

△：Presentation by Applicant for JSAP Young Scientists Presentation Award
▲：English Presentation
▼：Both of Above
No Mark：None of Above

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9:00 AM - 9:30 AM

[16a-E302-1] Evolution and Recent Trends of BEOL Technology

〇Kazuyoshi Ueno¹ (1.Shibaura Inst. Tech.)

9:30 AM - 10:00 AM

[16a-E302-2] Microelectronics Packaging Engineering and Advanced System Integration Technology

〇Takafumi Fukushima¹ (1.Tohoku Univ.)

10:00 AM - 10:30 AM

[16a-E302-3] NRE Cost Reduction of Domain Specific Accelerators by a Multi-IP SoC

〇Shinichi Ouchi¹ (1.AIST)

10:40 AM - 11:10 AM

[16a-E302-4] Wafer-level hybrid bonding for 3D integration technologies

〇Masahisa Fujino¹ (1.AIST)

11:10 AM - 11:40 AM

[16a-E302-5] Prospect for Semiconductor Nano-fabrication Technology for 3D Chiplet Integration.

〇Yasuhiro Morikawa¹ (1.ULVAC, ATI)

11:40 AM - 12:10 PM

[16a-E302-6] Trends in Advanced Substrate Technologies for Semiconductor Packaging

〇Ryuichi Matsuki¹, Shinji Nakazawa¹, Kiyoshi Oi¹, Noritaka Katagiri¹, Yasushi Araki¹ (1.SHINKO ELECTRIC INDUSTRIES)

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