[17a-A403-1~10] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[17a-A403-8] Integration Design of 3D CFET SRAM for Extremely Reduced Cell Size

〇WENHSIN CHANG¹, X. R. Yu^2,3, T. C. Hong^2,4, Y. J. Lee^2,4, T. S. Chao⁴, Y. H. Wang³, T. Maeda¹ (1.AIST, 2.TSRI, 3.NCKU, 4.NYCU)

Keywords:CFET, SRAM, CMOS