[F-6] Charge-Based Memory Devices for AI Applications

[F-6-03] Variation-robust Binary Matrix-vector Multiplication Method

〇Hyeongsu Kim¹, Inseok Lee¹, Woo Young Choi¹, Byung-Gook Park¹, Jong-Ho Lee¹ (1. Seoul Nat'l Univ. (Korea))

Presentation style: On-site (in-person)

https://doi.org/10.7567/SSDM.2022.F-6-03

Using two Flash memory devices and one capacitor as a synaptic cell, we present a variation-robust cal-culation method for binary matrix-vector multiplica-tion in this study. Spice simulation is used to examine the Vth variation impacts on the conventional current summation method and the proposed method. The sim-ulation results demonstrate that the proposed strategy is much more tolerant of Vth variation.